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2003 Microchip Technology Inc.
DS39582B-page 45
PIC16F87XA
TABLE 4-3:
PORTB FUNCTIONS
TABLE 4-4:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit#
Buffer
Function
RB0/INT
bit 0
TTL/ST(1)
Input/output pin or external interrupt input. Internal software programmable
weak pull-up.
RB1
bit 1
TTL
Input/output pin. Internal software programmable weak pull-up.
RB2
bit 2
TTL
Input/output pin. Internal software programmable weak pull-up.
RB3/PGM(3)
bit 3
TTL
Input/output pin or programming pin in LVP mode. Internal software
programmable weak pull-up.
RB4
bit 4
TTL
Input/output pin (with interrupt-on-change). Internal software programmable
weak pull-up.
RB5
bit 5
TTL
Input/output pin (with interrupt-on-change). Internal software programmable
weak pull-up.
RB6/PGC
bit 6
TTL/ST(2)
Input/output pin (with interrupt-on-change) or in-circuit debugger pin.
Internal software programmable weak pull-up. Serial programming clock.
RB7/PGD
bit 7
TTL/ST(2)
Input/output pin (with interrupt-on-change) or in-circuit debugger pin.
Internal software programmable weak pull-up. Serial programming data.
Legend:
TTL = TTL input, ST = Schmitt Trigger input
Note 1:
This buffer is a Schmitt Trigger input when configured as the external interrupt.
2:
This buffer is a Schmitt Trigger input when used in Serial Programming mode or in-circuit debugger.
3:
Low-Voltage ICSP Programming (LVP) is enabled by default which disables the RB3 I/O function. LVP
must be disabled to enable RB3 as an I/O pin and allow maximum compatibility to the other 28-pin and
40-pin mid-range devices.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
06h, 106h PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0 xxxx xxxx uuuu uuuu
86h, 186h TRISB
PORTB Data Direction Register
1111 1111 1111 1111
81h, 181h OPTION_REG RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
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